1. Field of the Invention
The present invention relates to an insulated gate-type semiconductor device, and a manufacturing method thereof. More particularly the present invention relates to an insulated gate type semiconductor device which is formed on the surface portion of a silicon substrate manufactured according to the CZochralski (CZ) process, and to a manufacturing method of the same semiconductor device.
2. Description of Related Art
Conventionally, a trench gate-type semiconductor device having a trench gate structure has been proposed as an insulated gate-type semiconductor device for power devices. In this trench gate-type semiconductor device, a gate insulation film about 100 nm thick is formed along the side wall of the trench in order to secure a generally high gate dielectric strength voltage. This gate insulation film is usually formed by means of thermal oxidation processing such as pyrogenic oxidation and dry oxidation.
Meanwhile, oxygen precipitates exist in the vicinity of the side wall of a trench. If it is intended to form the thick gate insulation film, the incidence of the oxygen precipitates taken into the inside of the gate insulation film increases. This oxygen precipitate acts as a weak spot in the gate insulation film, inducing a decrease in the gate dielectric strength voltage. To prevent the characteristics of the gate insulation film from deteriorating, accordingly, the concentration of oxygen in a wafer during an initial period is preferably 1.0×1016 atoms/cm3 or less in the area of the device in which the gate insulation film is to be formed.
As a semiconductor substrate for solving this problem, there is a wafer manufactured according to a Floating Zone (FZ) method (hereinafter a wafer manufactured according to the FZ method is referred to as a FZ wafer) (see Japanese unexamined patent publication No. 2004-103882). Because no silica crucible is used for manufacturing the FZ wafer, its oxygen concentration is lower than 1.0×1016 atoms/cm3.
Because a wafer manufactured according to the CZ method (hereinafter, a wafer manufactured according to the CZ method is referred to as a CZ wafer) has an oxygen concentration of 1.0×1017 atoms/cm3 or more, it is not suitable for purposes of forming the gate insulation film by thermal oxidation processing. Thus, when this wafer is used, an area with a low level at oxygen concentration is secured by forming an epitaxial layer having a desired thickness on the surface of a silicon substrate.
However, the above-described conventional techniques have the following problems. Specifically, the FZ wafer is low in mechanical strength, which tends to be cracked or slipped. Further, a wafer of a larger diameter than conventional wafers is demanded for the manufacture of semiconductor devices for power devices. However, although the diameter of a CZ wafer is generally about 200 mm, the diameter of a FZ wafer is mainly about 150 mm. Additionally, as compared with the CZ wafer, a FZ wafer has a lower throughput of production and the wafer itself is very expensive.
The mechanical strength of a CZ wafer can be improved and in its diameter can be increased in comparison with the FZ wafer. However, in the CZ wafer, a layer with a low level of defects (an epitaxial layer) needs to be formed by epitaxial growth on a wafer having a high level of oxygen concentration. Thus, the manufacturing process of a CZ wafer is complicated, thereby leading to a decrease in throughput in production and an increase in production cost.
Another method is a well known method for forming a layer with a low level of defects (a DZ layer) on the surface of a wafer by annealing (hydrogen annealing) at a temperature around 1200° C. in a hydrogen atmosphere to diffuse oxygen on the surface of the wafer outwardly. For the hydrogen annealing, however, a special apparatus needs to be additionally provided. Thus, not only is the manufacturing process complicated but also the initial costs are increased.